The present invention relates to a process for the autopositioning of an interconnection line on an electric contact hole of an integrated circuit. This autopositioning process can more particularly be used in processes for the production of MOS (metal-oxide-semiconductor) integrated circuits.
FIGS. 1 and 2 show in section and according to the prior art, the stages of a process for the autopositioning of an interconnection line on an electric contact hole of an integrated circuit. The integrated circuit 2 comprises a doped semiconducting active zone 4, corresponding e.g. to the source or drain of an MOS transistor, which is to be electrically connected to another, not shown, active zone of the integrated circuit. This active zone 4 is covered with an oxide coating 6, in which is produced the electric contact hole 7 of said active zone 4, by chemically etching oxide coating 6 to an appropriate mask placed on said coating. The interconnection of active zone 4 and the other active zone of the integrated circuit is brought about by covering a complete integrated circuit with a generally aluminum conductive coating 8, followed by the etching of said coating. As coating 8 has a constant thickness, it forms a cavity above the electric contact hole 7.
In order to produce the interconnection line 8a (visible in FIG. 2) in conductive coating 8, on the latter is deposited a resin layer 10, which is then etched so as to only remain in the cavity positioned above the electric contact hole 7. In a resin layer 12 is then formed a mask representing the image of the interconnection line. The conductive coating 8 is then etched trough the mask, e.g. isotropically by chemical etching, or anisotropically by a plasma containing compounds such as CCl.sub.4. The resin layers 10 and 12 are then eliminated. This leads to the interconnection line 8a shown in section in FIG. 2.
This process, described in French Patent Application No. 82 06409 of April 14, 1982 filed in the name of the present applicant, makes it possible to form interconnection lines on an electric contact hole, without said lines projecting beyond said hole. Thus, it makes it possible to produce interconnection lines, whose width does not exceed the diameter of the electric contact hole, which makes it possible to increase the integration density compared with other known processes. However, in this process, the residue of the first resin layer 10 has a limited thickness and only resists with difficulty the etching during the formation of the interconnection line.
Moreover, the active zone and the interconnection line are in direct contact and metal atoms, e.g. of aluminium with the metal coating is made from such a material, during subsequent heat treatment operations, diffuse into the active zone, which leads to leakage currents, which can be harmful to the satisfactory operation of integrated circuits.